Der Bundesblock, die Interessenvertretung der deutschen Blockchain-Szene in Berlin, hat eine deutsche Version seines Positionspapiers zur Token-Regulierung herausgegeben. Die überarbeitete Version des Papiers geht noch über die ursprüngliche Fassung hinaus. Wir haben uns das neue Papier einmal angeschaut und geben die Kernpunkte wieder. Der Bundesblock ist der erste deutsche Verband zur Förderung der Blockchain-Technologie in…Der Beitrag erschien zuerst auf .
Venrock, the venture capital firm backed by the Rockefeller family, is throwing its weight behind the cryptocurrency and blockchain industry. And this is not mere speculation as one of the firm’s partner has gone on record suggesting that Venrock is keen on riding the crypto wave.
In fact, the firm has reportedly already taken the first step by striking a deal with a cryptocurrency investor group.
In a recent conversation with , David Pakman, a Venrock partner, disclosed the firm’s deal with Brooklyn-based CoinFund. He stated that Venrock, whose net asset currently hovers somewhere around three billion is looking to diversify its financial portfolio and has decided that rapidly growing blockchain sector will be a good bet.
Exciting Time Ahead for Promising Crypto Enterprises
Venrock’s venture into crypto enterprises shortly after the multi-billion dollar Soros Fund Management to trade cryptocurrencies soon.
All goes well, Venrock has all the resources required to boost the growth of promising crypto enterprises in need of financial support. For the uninitiated, the firm has an excellent track record of spotting rising startups and helping them make it to the big leagues. In fact, it had a prominent to play in the success of many tech heavyweights that today dominate their respective industries, e.g., Apple and Intel.
The partnership with CoinFund signed earlier in April 2018, will help the VC firm to empower up-and-coming businesses to build exciting new projects based on blockchain technology.
CoinFund was founded in 2015 and since its launch, the investor group has backed many successful blockchain ventures.
Bringing the Blockchain to Traditional Tech Startups
Speaking of the new deal with Venrock, Jake Brukhman, co-founder of CoinFund, stated that the group is committed to helping out to reach their full potential and is ever-ready to collaborate with any organization keen on adding to its efforts.
“We’ll be working closely with them to help mentor, advise, and support teams in the space,” he said, before adding, “We’re trying to cultivate a unique synergy between teams as we see more experienced founders and more traditional tech startups taking up blockchain.”
Both Pakman and Brukhman seem convinced that blockchain technology has a lot to offer to businesses across industries and niches.
“The benefit of the advent of crypto is that we have fewer gatekeepers,” said Pakman in the conversation with Fortune. Calling venture capital basically “a gatekeeper industry,” he suggested that the time is ripe to put up an effort and change that.
“I don’t believe that a small group of people should make the decisions about which projects can raise some money and get off the ground.”
It is worth noting here that many and blockchain-related businesses. But among all those keen on making the most out of the so-called crypto wave, the Rockefeller family’s venture firm is arguably one of the wealthiest and has the capability to take things to the next level for many up-and-coming entities.
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In this blog post, I implement “FizzBuzz” by using an FPGA to generate raw VGA video output.
After my previous article
(),
some people asked about using video instead of serial output, so I gave it a try.
It turns out that creating video with an FPGA is surprisingly easy.
I got a bit carried away with the project and added animation, rainbow text and giant bouncing words to the display.
If you’re not familiar with the ““, the problem is to write a program that prints the numbers from 1 to 100, except multiples of 3 are replaced with the word “Fizz”, multiples of 5 with “Buzz” and multiples of both with “FizzBuzz”.
Since FizzBuzz can be implemented in a few lines of code, it can be used as an to weed out people who can’t program at all.
But it’s much more of a challenge on an FPGA.
An FPGA () is an interesting chip that you can program to implement arbitrary digital logic.
This lets you build a complex digital circuit without wiring up individual gates and flip flops.
It’s like having a custom chip that can be anything from a logic analyzer to a microprocessor to a video generator.
For this project, I used the (below).
Implementing FizzBuzz on an FPGA instead of a processor is rather pointless, but it is a good way to learn more about FPGAs.
Generating the VGA signals
There’s a learning curve to an FPGA, since you’re designing circuits, not writing software that runs on a processor.
But if you can blink five LEDs with an FPGA, you’re most of the way to creating a VGA video signal.
The VGA video format is a lot simpler than I expected:
just
three signals for the pixels (red, green and blue), and
two signals for horizontal sync and vertical sync.
The basic idea is to use two counters: one to count pixels horizontally and one to count lines vertically.
At each spot on the screen, the appropriate pixel color is generated from these x and y coordinates.
In addition, the horizontal and vertical sync signals are produced when the counters are at the right positions.
I used the basic 640×480 VGA screen resolution2 which requires counting to 800 and 525.111
Horizontally, there are 800 pixels for each line: 640 image pixels, followed by 16 blank pixels, 96 pixels of horizontal sync signal and 48 more blank pixels. (There are historical reasons for these strange numbers.)
Meanwhile, the vertical counter must count out 525 lines: 480 lines of pixels, 10 blank lines, 2 lines of vertical sync pulse and 33 more blank lines.
Putting this all together, I created a vga module () to generate the VGA signals.
This code is in Verilog (a standard language for FPGAs); I won’t explain Verilog thoroughly, but hopefully enough to show how it works.
The code below handles the x and y (horizontal pixel and vertical line) counters.
The first line indicates action is taken on the positive edge of each (50 MHz) clock signal.
The next line toggles clk25 each clock, creating the 25 MHz signal we’ll use for the pixel clock. (One confusing thing is that <= indicates assignment, not comparison.)
The code increments the x counter from 0 to 799.
At the end of each line, y is incremented, running from 0 to 524.
Thus, this code generates the necessary pixel and line counters.
always @(posedge clk) begin
clk25
